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0/1 Knapsack on Hardware: A Complete Solution
0/1 Knapsack on Hardware: A Complete Solution
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Conference Proceeding 		Add to e-Shelf

0/1 Knapsack on Hardware: A Complete Solution

Nibbelink, K. ; Rajopadhye, S. ; McConnell, R.

2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP), 2007, p.160-167

IEEE

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2
0.1 μm RFCMOS on high resistivity substrates for system on chip (SOC) applications
0.1 μm RFCMOS on high resistivity substrates for system on chip (SOC) applications
Material Type:
Conference Proceeding 		Add to e-Shelf

0.1 μm RFCMOS on high resistivity substrates for system on chip (SOC) applications

YANG, J.-Y ; BENAISSA, K ; ASHBURN, S ; MADHANI, P ; BLYTHE, T ; SHICHIJO, H ; CRENSHAW, D ; WILLIAMS, B ; SRIDHAR, S ; AI, J ; BOSELLI, G ; ZHAO, S ; TANG, S.-P ; MAHALINGAM, N

Piscataway NJ: IEEE 2002

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3
A 0-1 program to form minimum cost clusters in the downlink of cooperating base stations
A 0-1 program to form minimum cost clusters in the downlink of cooperating base stations
Material Type:
Conference Proceeding 		Add to e-Shelf

A 0-1 program to form minimum cost clusters in the downlink of cooperating base stations

Giovanidis, A. ; Krolikowski, J. ; Brueck, S.

2012 IEEE Wireless Communications and Networking Conference (WCNC), 2012, p.940-945

IEEE

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4
A 0.0018 mm frequency-to-digital-converter-based CMOS smart temperature sensor
A 0.0018 mm frequency-to-digital-converter-based CMOS smart temperature sensor
Material Type:
Article 		Add to e-Shelf

A 0.0018 mm frequency-to-digital-converter-based CMOS smart temperature sensor

Lee, Hokyu ; Kim, Kisoo ; Jung, Sangdon ; Song, Janghoon ; Kim, Jong-Kook ; Kim, Chulwoo

Analog integrated circuits and signal processing, 2010-08, Vol.64 (2), p.153-157 [Peer Reviewed Journal]

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5
A 0.004% resolution & SAT<1.8 μson-chip adaptive anti-aging system using cuckoo intelligence-based algorithm in 65 nm CMOS
A 0.004% resolution & SAT<1.8 μson-chip adaptive anti-aging system using cuckoo intelligence-based algorithm in 65 nm CMOS
Material Type:
Article 		Add to e-Shelf

A 0.004% resolution & SAT<1.8 μson-chip adaptive anti-aging system using cuckoo intelligence-based algorithm in 65 nm CMOS

Zhang, Yuejun ; Zhang, Haiming ; Wang, Pengjun ; Wu, Qiufeng ; Li, Gang

Integration (Amsterdam), 2021-05, Vol.78, p.135-143 [Peer Reviewed Journal]

Amsterdam: Elsevier B.V

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6
A 0.0043-mm2 0.085-&#956;W/MHz Relaxation Oscillator Using Charge-Prestored Asymmetric Swings R- RC Network
A 0.0043-mm2 0.085-&#956;W/MHz Relaxation Oscillator Using Charge-Prestored Asymmetric Swings R- RC Network
Material Type:
Article 		Add to e-Shelf

A 0.0043-mm2 0.085-μW/MHz Relaxation Oscillator Using Charge-Prestored Asymmetric Swings R- RC Network

Wei, Yuchen ; Yang, Shiheng ; Liu, Yueduo ; Bao, Rongxin ; Zhu, Zihao ; Lin, Jiahui ; Zhang, Zehao ; Chen, Yong ; Yin, Jun ; Mak, Pui-In ; Li, Qiang

IEEE transactions on very large scale integration (VLSI) systems, 2023-08, Vol.31 (8), p.1248 [Peer Reviewed Journal]

New York: The Institute of Electrical and Electronics Engineers, Inc. (IEEE)

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7
A 0.015-mm ^} Inductorless 32-GHz Clock Generator With Wide Frequency-Tuning Range in 28-nm CMOS Technology
A 0.015-mm ^} Inductorless 32-GHz Clock Generator With Wide Frequency-Tuning Range in 28-nm CMOS Technology
Material Type:
Article 		Add to e-Shelf

A 0.015-mm ^} Inductorless 32-GHz Clock Generator With Wide Frequency-Tuning Range in 28-nm CMOS Technology

Jeong, Gyu-Seob ; Kim, Wooseok ; Park, Jaejin ; Kim, Taeik ; Park, Hojin ; Jeong, Deog-Kyoon

IEEE transactions on circuits and systems. II, Express briefs, 2017-06, Vol.64 (6), p.655-659 [Peer Reviewed Journal]

New York: IEEE

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8
A 0.016 mV/mA Cross-Regulation 5-Output SIMO DC-DC Buck Converter Using Output-Voltage-Aware Charge Control Scheme
A 0.016 mV/mA Cross-Regulation 5-Output SIMO DC-DC Buck Converter Using Output-Voltage-Aware Charge Control Scheme
Material Type:
Article 		Add to e-Shelf

A 0.016 mV/mA Cross-Regulation 5-Output SIMO DC-DC Buck Converter Using Output-Voltage-Aware Charge Control Scheme

Ngoc-Son Pham ; Taegeun Yoo ; Kim, Tony Tae-Hyoung ; Chan-Gun Lee ; Kwang-Hyun Baek

IEEE transactions on power electronics, 2018-11, Vol.33 (11), p.9619-9630 [Peer Reviewed Journal]

New York: IEEE

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9
A 0.07 mm[Formula Omitted] Asynchronous Logic CMOS Pulsed Receiver Based on Radio Events Self-Synchronization
A 0.07 mm[Formula Omitted] Asynchronous Logic CMOS Pulsed Receiver Based on Radio Events Self-Synchronization
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Article 		Add to e-Shelf

A 0.07 mm[Formula Omitted] Asynchronous Logic CMOS Pulsed Receiver Based on Radio Events Self-Synchronization

Crepaldi, Marco ; Macis, Silvia ; Ros, Paolo Motto ; Demarchi, Danilo

IEEE transactions on circuits and systems. I, Regular papers, 2014-03, Vol.61 (3), p.750 [Peer Reviewed Journal]

New York: The Institute of Electrical and Electronics Engineers, Inc. (IEEE)

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10
A 0.1-2-GHz Quadrature Correction Loop for Digital Multiphase Clock Generation Circuits in 130-nm CMOS
A 0.1-2-GHz Quadrature Correction Loop for Digital Multiphase Clock Generation Circuits in 130-nm CMOS
Material Type:
Article 		Add to e-Shelf

A 0.1-2-GHz Quadrature Correction Loop for Digital Multiphase Clock Generation Circuits in 130-nm CMOS

Raja, Immanuel ; Khatri, Vishal ; Zahir, Zaira ; Banerjee, Gaurab

IEEE transactions on very large scale integration (VLSI) systems, 2017-03, Vol.25 (3), p.1044-1053 [Peer Reviewed Journal]

IEEE

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