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IP reuse VLSI architecture for low complexity fast motion estimation in multimedia applications
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Ata de Congresso
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IP reuse VLSI architecture for low complexity fast motion estimation in multimedia applications

Fanucci, L. ; Saponara, S. ; Cenciotti, A.

Proceedings of the 26th Euromicro Conference. EUROMICRO 2000. Informatics: Inventing the Future, 2000, Vol.1, p.417-424 vol.1

IEEE

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2
A QoS Internet protocol scheduler on the IXP1200 network platform
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A QoS Internet protocol scheduler on the IXP1200 network platform

De Bernardinis, F. ; Fanucci, L. ; Ramacciotti, T. ; Terreni, P.

The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings, 2003, p.394-399

IEEE

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3
VLSI design of a high-throughput multi-rate decoder for structured LDPC codes
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VLSI design of a high-throughput multi-rate decoder for structured LDPC codes

Rovini, M. ; L'Insalata, N.E. ; Rossi, F. ; Fanucci, L.

8th Euromicro Conference on Digital System Design (DSD'05), 2005, p.202-209

IEEE

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4
High-Throughput Multi-Rate Decoding of Structured Low-Density Parity-Check Codes
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Artigo
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High-Throughput Multi-Rate Decoding of Structured Low-Density Parity-Check Codes

FANUCCI, L.

IEICE transactions on fundamentals of electronics, communications and computer sciences, 2005-12, Vol.E88-A (12), p.3539-3547 [Periódico revisado por pares]

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5
Design and Validation of Digital Channels for a Galileo Receiver Prototype
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Design and Validation of Digital Channels for a Galileo Receiver Prototype

Rossi, F. ; Rovini, M. ; Fanucci, L. ; Marradi, L. ; Giachella, G. ; Palmiero, I. ; lacone, P.

9th EUROMICRO Conference on Digital System Design (DSD'06), 2006, p.545-549

IEEE

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6
Layered Decoding of Non-Layered LDPC Codes
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Ata de Congresso
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Layered Decoding of Non-Layered LDPC Codes

Rovini, M. ; Rossi, F. ; Ciao, P. ; L'Insalata, N. ; Fanucci, L.

9th EUROMICRO Conference on Digital System Design (DSD'06), 2006, p.537-544

IEEE

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7
Large Scale On-Chip Networks : An Accurate Multi-FPGA Emulation Platform
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Ata de Congresso
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Large Scale On-Chip Networks : An Accurate Multi-FPGA Emulation Platform

Kouadri-Mostefaoui ; Abdellah-Medjadji ; Senouci, B. ; Petrot, F.

2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, 2008, p.3-9

IEEE

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8
An Embedded Acquisition System for Remote Monitoring of Tire Status in F1 Race Cars through Thermal Images
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An Embedded Acquisition System for Remote Monitoring of Tire Status in F1 Race Cars through Thermal Images

Danese, G. ; Giachero, M. ; Leporati, F. ; Nazzicari, N. ; Nobis, M.

2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, 2008, p.432-437

IEEE

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9
Exploiting WSN for Audio Surveillance Applications: The VoWSN Approach
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Exploiting WSN for Audio Surveillance Applications: The VoWSN Approach

Alesii, Roberto ; Graziosi, Fabio ; Pomante, Luigi ; Rinaldi, Claudia

2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, 2008, p.520-524

IEEE

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10
How to Live with Uncertainties: Exploiting the Performance Benefits of Self-Timed Logic In Synchronous Design
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How to Live with Uncertainties: Exploiting the Performance Benefits of Self-Timed Logic In Synchronous Design

Paci, G. ; Nackaerts, A. ; Catthoor, F. ; Benini, L. ; Marchal, P.

2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, 2008, p.550-557

IEEE

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