Result Number | Material Type | Add to My Shelf Action | Record Details and Options |
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1 |
Material Type: Ata de Congresso
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Low Complexity LDPC Code Decoders for Next Generation StandardsBrack, T. ; Alles, M. ; Lehnigk-Emden, T. ; Kienle, F. ; Wehn, N. ; L'Insalata, N.E. ; Rossi, F. ; Rovini, M. ; Fanucci, L.2007 Design, Automation & Test in Europe Conference & Exhibition, 2007, p.1-6IEEETexto completo disponível |
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2 |
Material Type: Ata de Congresso
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A Programmable and Low-EMI Integrated Half-Bridge Driver in BCD TechnologyD'Ascoli, F. ; Bacciarelli, L. ; Melani, M. ; Fanucci, L. ; Ricotti, G. ; Pardi, E. ; Vincis, F. ; Forliti, M. ; De Marinis, M.2008 Design, Automation and Test in Europe, 2008, p.879-884IEEETexto completo disponível |
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3 |
Material Type: Artigo
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VLSI implementation of a signal recognition and code acquisition algorithm for CDMA packet receiversFanucci, L. ; de Gaudenzi, R. ; Giannetti, F. ; Luise, M.IEEE journal on selected areas in communications, 1998-12, Vol.16 (9), p.1796-1808 [Periódico revisado por pares]IEEETexto completo disponível |
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4 |
Material Type: Ata de Congresso
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Single-chip mixed-radix FFT processor for real-time on-board SAR processingFanucci, L. ; Forliti, M. ; Gronchi, F.ICECS'99. Proceedings of ICECS '99. 6th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.99EX357), 1999, Vol.2, p.1135-1138 vol.2IEEETexto completo disponível |
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5 |
Material Type: Artigo
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VLSI implementation of a CDMA blind adaptive interference-mitigating detectorFanucci, L. ; Letta, E. ; de Daudenzi, R. ; Giannetti, F. ; Luise, M.IEEE journal on selected areas in communications, 2001-02, Vol.19 (2), p.179-190 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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6 |
Material Type: Ata de Congresso
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IP reuse VLSI architecture for low complexity fast motion estimation in multimedia applicationsFanucci, L. ; Saponara, S. ; Cenciotti, A.Proceedings of the 26th Euromicro Conference. EUROMICRO 2000. Informatics: Inventing the Future, 2000, Vol.1, p.417-424 vol.1IEEETexto completo disponível |
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7 |
Material Type: Ata de Congresso
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8051 CPU core optimization for low power at register transfer levelIozzi, F. ; Saponara, S. ; Morello, A.J. ; Fanucci, L.Research in Microelectronics and Electronics, 2005 PhD, 2005, Vol.2, p.178-181IEEETexto completo disponível |
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8 |
Material Type: Ata de Congresso
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Mechanical stress measurement electronics based on piezo-resistive and piezo-Hall effectsMagnani, R. ; Tinfena, F. ; Kempe, V. ; Fanucci, L.9th International Conference on Electronics, Circuits and Systems, 2002, Vol.1, p.363-366 vol.1IEEETexto completo disponível |
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9 |
Material Type: Ata de Congresso
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A Scalable Decoder Architecture for IEEE 802.11n LDPC CodesRovini, M. ; Gentile, G. ; Rossi, F. ; Fanucci, L.IEEE GLOBECOM 2007 - IEEE Global Telecommunications Conference, 2007, p.3270-3274IEEETexto completo disponível |
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10 |
Material Type: Ata de Congresso
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VLSI design of a high-throughput multi-rate decoder for structured LDPC codesRovini, M. ; L'Insalata, N.E. ; Rossi, F. ; Fanucci, L.8th Euromicro Conference on Digital System Design (DSD'05), 2005, p.202-209IEEETexto completo disponível |