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1
Tag management in a reconfigurable tagged-token dataflow architecture
Tag management in a reconfigurable tagged-token dataflow architecture
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Tag management in a reconfigurable tagged-token dataflow architecture

Bruno de Abreu Silva Jorge Luiz e Silva

WSEAS Transactions on Computers Sofia, BG : WSEAS v. 14, p. 730-739, 2015

Sofia, BG 2015

Acesso online. A biblioteca também possui exemplares impressos.

2
A dynamic dataflow architecture using partial reconfigurable hardware as an option for multiple cores
A dynamic dataflow architecture using partial reconfigurable hardware as an option for multiple cores
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A dynamic dataflow architecture using partial reconfigurable hardware as an option for multiple cores

Jorge Luiz e Silva Joelmir José Lopes

WSEAS Transactions on Computers Wisconsin : WSEAS v. 5, n. 9, p. 429-444, 2010

Wisconsin 2010

Acesso online. A biblioteca também possui exemplares impressos.

3
A dynamic dataflow architecture using partial reconfigurable hardware as an option for multiple cores
A dynamic dataflow architecture using partial reconfigurable hardware as an option for multiple cores
Material Type:
Artigo 		Adicionar ao Meu Espaço

A dynamic dataflow architecture using partial reconfigurable hardware as an option for multiple cores

Jorge Luiz e Silva Joelmir José Lopes

WSEAS Transactions on Computers Wisconsin : WSEAS v. 5, n. 9, p. 429-444, 2010

Wisconsin 2010

Acesso online. A biblioteca também possui exemplares impressos.

4
The C compiler generating a source file in VHDL for a dynamic dataflow machine being executed direct into a hardware
The C compiler generating a source file in VHDL for a dynamic dataflow machine being executed direct into a hardware
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The C compiler generating a source file in VHDL for a dynamic dataflow machine being executed direct into a hardware

Jorge Luiz e Silva Kelton Augusto Pontara da Costa; Valentin Obac Roda

WSEAS Transactions on Computers Athens v. 8, n. 12, p. 1908-1916, Dec. 2009

Athens 2009

Localização: EESC - Esc. Engenharia de São Carlos    (PROD-012476 )(Acessar)

5
The C compiler generating a source file in VHDL for a dynamic dataflow machine being executed direct into a hardware
The C compiler generating a source file in VHDL for a dynamic dataflow machine being executed direct into a hardware
Material Type:
Artigo 		Adicionar ao Meu Espaço

The C compiler generating a source file in VHDL for a dynamic dataflow machine being executed direct into a hardware

Jorge Luiz e Silva Kelton Augusto Pontara da Costa; Valentin Obac Roda

WSEAS Transactions on Computers Athens v. 8, n. 12, p. 1908-1916, Dec. 2009

Athens 2009

Item não circula. Consulte sua biblioteca.(Acessar)

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  1. Disponível na Biblioteca (4)
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Autor/Criador 

  1. Lopes, J  (2)
  2. Obac Roda, V  (2)
  3. Costa, K  (2)
  4. Silva, B  (1)
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Deste Autor:

  1. Silva, J
  2. Lopes, J
  3. Obac Roda, V
  4. Costa, K
  5. Silva, B

Neste Assunto:

  1. Computação Evolutiva
  2. Robótica
  3. Sistemas Embutidos

  • Realização: ABCD-USP USP   Logos de Redes Sociais: Freepik

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