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Refinado por: assunto: Delay remover
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1
Hardware Support for Prescient Instruction Prefetch
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Hardware Support for Prescient Instruction Prefetch

Aamodt, T.M. ; Chow, P. ; Hammarlund, P. ; Wang, Hong ; Shen, J.P.

10th International Symposium on High Performance Computer Architecture (HPCA'04), 2004, p.84-84

Los Alamitos CA: IEEE

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2
Timing minimization by statistical timing hMetis-based partitioning
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Timing minimization by statistical timing hMetis-based partitioning

Ababei, C. ; Bazargan, K.

16th International Conference on VLSI Design, 2003. Proceedings, 2003, p.58-63

IEEE

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3
Adding confidentiality to application-level multicast by leveraging the multicast overlay
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Adding confidentiality to application-level multicast by leveraging the multicast overlay

Abad, C. ; Gupta, I. ; Yurcik, W.

25th IEEE International Conference on Distributed Computing Systems Workshops, 2005, p.5-11

IEEE

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4
Time/space sharing distributed job scheduling policy in a workstation cluster environment
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Time/space sharing distributed job scheduling policy in a workstation cluster environment

Abawajy, J.H. ; Dandamudi, S.P.

Proceedings International Conference on Parallel Computing in Electrical Engineering. PARELEC 2000, 2000, p.116-120

IEEE

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5
Using DDL to understand and modify SimpleScalar
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Using DDL to understand and modify SimpleScalar

Abbas, N. ; Tambe, S. ; Cook, J.E.

11th Working Conference on Reverse Engineering, 2004, p.296-297

Los Alamitos CA: IEEE

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6
Path-delay fault simulation for circuits with large numbers of paths for very large test sets
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Path-delay fault simulation for circuits with large numbers of paths for very large test sets

Abdulrazzaq, N.M. ; Gupta, S.K.

Proceedings. 21st VLSI Test Symposium, 2003, 2003, p.186-193

IEEE

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7
Low-complexity distributed issue queue
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Low-complexity distributed issue queue

Abella, J. ; Gonzalez, A.

10th International Symposium on High Performance Computer Architecture (HPCA'04), 2004, p.73-82

Los Alamitos CA: IEEE

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8
On reducing register pressure and energy in multiple-banked register files
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On reducing register pressure and energy in multiple-banked register files

Abella, J. ; Gonzalez, A.

Proceedings 21st International Conference on Computer Design, 2003, p.14-20

IEEE

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9
The performance of Ethernet under a combined data/real-time traffic
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The performance of Ethernet under a combined data/real-time traffic

Aboelaze, M.A. ; Elnaggar, Y.

Proceedings 25th Annual IEEE Conference on Local Computer Networks. LCN 2000, 2000, p.349-350

IEEE

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10
Efficient backtracking instruction schedulers
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Efficient backtracking instruction schedulers

Abraham, S.G. ; Meleis, W.M. ; Baev, I.D.

Proceedings 2000 International Conference on Parallel Architectures and Compilation Techniques (Cat. No.PR00622), 2000, p.301-308

IEEE

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