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1
Simultaneous Scheduling and Core-Type Optimization for Moldable Fork-Join Tasks on Heterogeneous Multicores
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Simultaneous Scheduling and Core-Type Optimization for Moldable Fork-Join Tasks on Heterogeneous Multicores

NISHIKAWA, Hiroki ; SHIMADA, Kana ; TANIGUCHI, Ittetsu ; TOMIYAMA, Hiroyuki

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2022/03/01, Vol.E105.A(3), pp.540-548 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

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2
Sorting Matrix Architecture for Continuous Data Sequences
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Sorting Matrix Architecture for Continuous Data Sequences

XUE, Meiting ; ZHANG, Huan ; LI, Weijun ; YU, Feng

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2020/02/01, Vol.E103.A(2), pp.542-546 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

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3
Low-Complexity Digital Channelizer Design for Software Defined Radio
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Low-Complexity Digital Channelizer Design for Software Defined Radio

HAO, Jinguang ; WANG, Gang ; HongWANG, Gang ; WANG, Lili ; LIU, Xuefeng

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2024/01/01, Vol.E107.A(1), pp.134-140 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

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4
Giving a Quasi-Initial Solution to Ising Machines by Controlling External Magnetic Field Coefficients
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Giving a Quasi-Initial Solution to Ising Machines by Controlling External Magnetic Field Coefficients

KAWAKAMI, Soma ; OHNO, Kentaro ; BA, Dema ; YAGI, Satoshi ; TERAMOTO, Junji ; TOGAWA, Nozomu

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2024/01/01, Vol.E107.A(1), pp.52-62 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

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5
Fast and Accurate Architecture Exploration for High Performance and Low Energy VLIW Data-Path
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Fast and Accurate Architecture Exploration for High Performance and Low Energy VLIW Data-Path

TANIGUCHI, Ittetsu ; AOKI, Kohei ; TOMIYAMA, Hiroyuki ; RAGHAVAN, Praveen ; CATTHOOR, Francky ; FUKUI, Masahiro

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2014/02/01, Vol.E97.A(2), pp.606-615 [Periódico revisado por pares]

The Institute of Electronics, Information and Communication Engineers

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6
Quantized Gradient Descent Algorithm for Distributed Nonconvex Optimization
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Quantized Gradient Descent Algorithm for Distributed Nonconvex Optimization

YOSHIDA, Junya ; HAYASHI, Naoki ; TAKAI, Shigemasa

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2023/10/01, Vol.E106.A(10), pp.1297-1304 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

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7
Theory and Application of Topology-Based Exact Synthesis for Majority-Inverter Graphs
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Theory and Application of Topology-Based Exact Synthesis for Majority-Inverter Graphs

GE, Xianliang ; KIMURA, Shinji

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2023/09/01, Vol.E106.A(9), pp.1241-1250 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

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8
Ultrasonic Measurement of the Thin Oil-Slick Thickness Based on the Compressed Sensing Method
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Ultrasonic Measurement of the Thin Oil-Slick Thickness Based on the Compressed Sensing Method

YAO, Di ; ZHANG, Qifeng ; TIAN, Qiyan ; DU, Hualong

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2023/07/01, Vol.E106.A(7), pp.998-1001 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

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9
Persymmetric Structured Covariance Matrix Estimation Based on Whitening for Airborne STAP
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Persymmetric Structured Covariance Matrix Estimation Based on Whitening for Airborne STAP

MA, Quanxin ; DU, Xiaolin ; LI, Jianbo ; JING, Yang ; CHANG, Yuqing

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2023/07/01, Vol.E106.A(7), pp.1002-1006 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

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10
Hardware Architecture for High-Speed Object Detection Using Decision Tree Ensemble
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Hardware Architecture for High-Speed Object Detection Using Decision Tree Ensemble

MITSUNARI, Koichi ; YU, Jaehoon ; ONOYE, Takao ; HASHIMOTO, Masanori

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2018/09/01, Vol.E101.A(9), pp.1298-1307 [Periódico revisado por pares]

Tokyo: The Institute of Electronics, Information and Communication Engineers

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