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1
Hardware implementation and analysis of memory interfaces to integrate a vector accelerator into a manycore Network-on-Chip
Hardware implementation and analysis of memory interfaces to integrate a vector accelerator into a manycore Network-on-Chip
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Hardware implementation and analysis of memory interfaces to integrate a vector accelerator into a manycore Network-on-Chip

Lu, Ci Chian

eScholarship, University of California 2023

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2
A Loosely-Timed TLM-2.0 Model of a JPEG Encoder on a Checkerboard GPC
A Loosely-Timed TLM-2.0 Model of a JPEG Encoder on a Checkerboard GPC
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A Loosely-Timed TLM-2.0 Model of a JPEG Encoder on a Checkerboard GPC

Daroui, Arya

eScholarship, University of California 2022

Sem texto completo

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3
A Novel Systolic Architecture for Efficient Acceleration of Deconvolutional Neural Networks at the Edge
A Novel Systolic Architecture for Efficient Acceleration of Deconvolutional Neural Networks at the Edge
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A Novel Systolic Architecture for Efficient Acceleration of Deconvolutional Neural Networks at the Edge

Daly, Jake M

eScholarship, University of California 2021

Sem texto completo

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4
A Fully Pipelined and Dynamically Composable Architecture of CGRA (Coarse Grained Reconfigurable Architecture)
A Fully Pipelined and Dynamically Composable Architecture of CGRA (Coarse Grained Reconfigurable Architecture)
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A Fully Pipelined and Dynamically Composable Architecture of CGRA (Coarse Grained Reconfigurable Architecture)

Zhou, Peipei

eScholarship, University of California 2014

Sem texto completo

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5
PERRY: A Flexible and Scalable Data Preprocessing System for "ML for Networks" Pipelines
PERRY: A Flexible and Scalable Data Preprocessing System for "ML for Networks" Pipelines
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PERRY: A Flexible and Scalable Data Preprocessing System for "ML for Networks" Pipelines

Battula, Navya

eScholarship, University of California 2023

Sem texto completo

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6
Elastic Processing and Hardware Architectures for Machine Learning
Elastic Processing and Hardware Architectures for Machine Learning
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Elastic Processing and Hardware Architectures for Machine Learning

Liu, Liu

eScholarship, University of California 2022

Sem texto completo

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7
Understanding and Estimating Uncertainties and Risks in Architecture Design: from Analytical Analysis to Detailed Simulation
Understanding and Estimating Uncertainties and Risks in Architecture Design: from Analytical Analysis to Detailed Simulation
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Understanding and Estimating Uncertainties and Risks in Architecture Design: from Analytical Analysis to Detailed Simulation

Cui, Weilong

eScholarship, University of California 2019

Sem texto completo

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8
Machine Learning in IoT Systems: From Deep Learning to Hyperdimensional Computing
Machine Learning in IoT Systems: From Deep Learning to Hyperdimensional Computing
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Machine Learning in IoT Systems: From Deep Learning to Hyperdimensional Computing

Imani, Mohsen

eScholarship, University of California 2020

Sem texto completo

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9
Pyrope: A Latency-Insensitive Digital Architecture Toolchain
Pyrope: A Latency-Insensitive Digital Architecture Toolchain
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Pyrope: A Latency-Insensitive Digital Architecture Toolchain

Skinner, Haven Blake

eScholarship, University of California 2018

Sem texto completo

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10
Efficient Acceleration of Computation Using Associative In-memory Processing
Efficient Acceleration of Computation Using Associative In-memory Processing
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Efficient Acceleration of Computation Using Associative In-memory Processing

YANTIR, Hasan Erdem

eScholarship, University of California 2018

Sem texto completo

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