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Refinado por: data de publicação: 1973Até1988 remover tipo de recurso: Patentes remover assunto: Parallel Processing remover
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1
Adaptive associative-processing optical computing architectures
Adaptive associative-processing optical computing architectures
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Adaptive associative-processing optical computing architectures

Fisher, A.D.

United States 1986

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2
Method and apparatus for communicating data between a host and a plurality of parallel processors
Method and apparatus for communicating data between a host and a plurality of parallel processors
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Method and apparatus for communicating data between a host and a plurality of parallel processors

Auerbach, D.J. ; Chen, T.C. ; Paul, W.J.

United States 1988

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3
Digital computer with cache capable of concurrently handling multiple accesses from parallel processors
Digital computer with cache capable of concurrently handling multiple accesses from parallel processors
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Digital computer with cache capable of concurrently handling multiple accesses from parallel processors

Ziegler, M.L. ; Blau, J.S. ; Fredieu, R.L.

United States 1988

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4
Interleaved pipeline parallel processing architecture
Interleaved pipeline parallel processing architecture
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Interleaved pipeline parallel processing architecture

Hannah, M.

United States 1988

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5
Method to manage coprocessor in a virtual memory virtual machine data processing system
Method to manage coprocessor in a virtual memory virtual machine data processing system
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Method to manage coprocessor in a virtual memory virtual machine data processing system

Barnes, J.G. ; Blackard, J.W. ; Krishnamurty, R. ; Mothersole, T.L.

United States 1988

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6
Fair arbitration technique for a split transaction bus in a multiprocessor computer system
Fair arbitration technique for a split transaction bus in a multiprocessor computer system
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Fair arbitration technique for a split transaction bus in a multiprocessor computer system

Fischer, M.A.

United States 1988

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7
Method of simulating additional processors in a simd parallel processor array
Method of simulating additional processors in a simd parallel processor array
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Method of simulating additional processors in a simd parallel processor array

Hillis, W.D. ; Lasser, C. ; Kahle, B. ; Sims, K.

United States 1988

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8
Parallel processing network and method
Parallel processing network and method
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Parallel processing network and method

DeBenedictis, E.P.

United States 1988

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9
Parallel processor/memory circuit
Parallel processor/memory circuit
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Parallel processor/memory circuit

Hillis, W.D. ; Knight, T.F. Jr ; Bawden, A. ; Kahle, B.L. ; Chapman, D. ; Christman, D.P. ; Lasser, C.A. ; Feynman, C.R.

United States 1987

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10
Bifurcated method and apparatus for floating point addition with decreased latency time
Bifurcated method and apparatus for floating point addition with decreased latency time
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Bifurcated method and apparatus for floating point addition with decreased latency time

Farmwald, P.M.

United States 1987

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