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Refinado por: data de publicação: 1973Até1988 remover Base de dados/Biblioteca: IEEE Electronic Library (IEL) Conference Proceedings remover assunto: Very Large Scale Integration remover
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1
Architecture and design of the MARS hardware accelerator
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Architecture and design of the MARS hardware accelerator

Agrawal, P ; Dally, W ; Ezzat, A ; Fischer, W ; Jagadish, H ; Krishnakumar, A

24th ACM/IEEE Design Automation Conference, 1987, p.101-107

ACM

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2
Image computations on reconfigurable VLSI arrays
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Image computations on reconfigurable VLSI arrays

Miller, R. ; Prasanna-Kumar, V.K. ; Reisis, D.I. ; Stout, Q.F.

Proceedings CVPR '88: The Computer Society Conference on Computer Vision and Pattern Recognition, 1988, p.925-930

IEEE Comput. Soc. Press

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3
An architecture design and assessment system for software/hardware codesign
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An architecture design and assessment system for software/hardware codesign

Smith, Connie ; Frank, Geoffrey ; Cuadrado, John

22nd ACM/IEEE Design Automation Conference, 1985, p.417-424

IEEE Press

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4
Functional simulation shortens the development cycle of a new computer
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Functional simulation shortens the development cycle of a new computer

Cheng, Raymond ; Griffin, Brian ; Katsumata, Kun ; Welsh, John

20th Design Automation Conference Proceedings, 1983, p.515-519

IEEE Press

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5
Statistics on logic simulation
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Statistics on logic simulation

Wong, K ; Franklin, M ; Chamberlain, R ; Shing, B

23rd ACM/IEEE Design Automation Conference, 1986, p.13-19

IEEE Press

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6
A prototype framework for knowledge-based analog circuit synthesis
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A prototype framework for knowledge-based analog circuit synthesis

Harjani, R ; Rutenbar, R ; Carley, L

24th ACM/IEEE Design Automation Conference, 1987, p.42-49

ACM

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7
Implementation of recursive and nonrecursive digital filters using the single multiplexed ROM in the quadratic residue number system
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Implementation of recursive and nonrecursive digital filters using the single multiplexed ROM in the quadratic residue number system

Krishnan, R.

1988 IEEE International Symposium on Circuits and Systems (ISCAS), 1988, p.1297-1300 vol.2

IEEE

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8
Fuzzy systolic arrays
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Fuzzy systolic arrays

Manzoul, M.A. ; Serrate, H.A.

[1988] Proceedings. The Eighteenth International Symposium on Multiple-Valued Logic, 1988, p.106-112

IEEE Comput. Soc. Press

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9
Serial/Parallel architectures for area-efficient vector multiplication
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Serial/Parallel architectures for area-efficient vector multiplication

Smith, S. ; Denyer, P.

ICASSP '87. IEEE International Conference on Acoustics, Speech, and Signal Processing, 1987, Vol.12, p.539-542

IEEE

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10
Transistor sizing in CMOS circuits
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Transistor sizing in CMOS circuits

Cirit, M

24th ACM/IEEE Design Automation Conference, 1987, p.121-124

ACM

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