A fully pipelined single-precision floating-point unit in the synergistic processor element of a CELL processor

Hwa-Joon Oh ; Mueller, S.M. ; Jacobi, C. ; Tran, K.D. ; Cottier, S.R. ; Michael, B.W. ; Nishikawa, H. ; Totsuka, Y. ; Namatame, T. ; Yano, N. ; Machida, T. ; Dhong, S.H.

IEEE journal of solid-state circuits, 2006-04, Vol.41 (4), p.759-771 [Periódico revisado por pares]

New York, NY: IEEE

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