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Combining Static and Dynamic Data Coalescing in Unified Parallel C

Alvanos, Michail ; Farreras, Montse ; Tiotto, Ettore ; Amaral, Jose Nelson ; Martorell, Xavier

IEEE transactions on parallel and distributed systems, 2016-02, Vol.27 (2), p.381-393 [Periódico revisado por pares]

New York: IEEE

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Título:
Combining Static and Dynamic Data Coalescing in Unified Parallel C
Autor: Alvanos, Michail ; Farreras, Montse ; Tiotto, Ettore ; Amaral, Jose Nelson ; Martorell, Xavier
Assuntos: Arquitectura de computadors ; Arquitectures distribuïdes ; Arquitectures paral·leles ; Automation ; C (Computer program language) ; C (Llenguatge de programació) ; Computer programming ; Distributed databases ; Electronics packaging ; Hybrid computers ; Indexes ; Informàtica ; Languages ; Mapping ; Message systems ; Networks ; One-Sided Communication ; Optimization ; Parallel processing (Electronic computers) ; Partitioned Global Address Space ; Performance Evaluation ; Portable document format ; Processament en paral·lel (Ordinadors) ; Programming ; Remote computing ; Runtime ; Transformations ; Transformations (mathematics) ; Unified Parallel C ; Àrees temàtiques de la UPC
É parte de: IEEE transactions on parallel and distributed systems, 2016-02, Vol.27 (2), p.381-393
Notas: ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
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Descrição: Significant progress has been made in the development of programming languages and tools that are suitable for hybrid computer architectures that group several shared-memory multicores interconnected through a network. This paper addresses important limitations in the code generation for partitioned global address space (PGAS) languages. These languages allow fine-grained communication and lead to programs that perform many fine-grained accesses to data. When the data is distributed to remote computing nodes, code transformations are required to prevent performance degradation. Until now code transformations to PGAS programs have been restricted to the cases where both the physical mapping of the data or the number of processing nodes are known at compilation time. In this paper, a novel application of the inspector-executor model overcomes these limitations and allows profitable code transformations, which result in fewer and larger messages sent through the network, when neither the data mapping nor the number of processing nodes are known at compilation time. A performance evaluation reports both scaling and absolute performance numbers on up to 32,768 cores of a Power 775 supercomputer. This evaluation indicates that the compiler transformation results in speedups between 1.15x and 21x over a baseline and that these automated transformations achieve up to 63 percent the performance of the MPI versions.
Editor: New York: IEEE
Idioma: Inglês

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Combining Static and Dynamic Data Coalescing in Unified Parallel C

Alvanos, Michail ; Farreras, Montse ; Tiotto, Ettore ; Amaral, Jose Nelson ; Martorell, Xavier

New York: IEEE

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