Idioma:

Module Clustering to Minimize Delay in Digital Networks

Lawler, E.L. ; Levitt, K.N. ; Turner, J.

IEEE transactions on computers, 1969-01, Vol.C-18 (1), p.47-57 [Periódico revisado por pares]

Texto completo disponível

Citações Citado por

Título:
Module Clustering to Minimize Delay in Digital Networks
Autor: Lawler, E.L. ; Levitt, K.N. ; Turner, J.
Assuntos: Graph decomposition ; logic partitioning ; minimization of longest delay
É parte de: IEEE transactions on computers, 1969-01, Vol.C-18 (1), p.47-57
Descrição: An important aspect of the packaging of digital networks is the allocation of logic gates to modules such that a predetermined objective function is minimized. In order to develop techniques for this partitioning of a logic network we have considered the following problem: Given an acyclic combinational network composed of various primitive blocks such as NOR gates, assume that a maximum of M gates can be "clustered" together into larger modules, and that a maximum of P pins can be accommodated in each larger module. Assume also that in a network composed of such larger modules, no delay is encountered on the interconnections linking two gates internal to a module and a delay of one time unit is encountered on interconnections linking two gates in different modules . Find an easily applied algorithm that will result in a network such that the maximum delay through the network is minimized.
Editor: IEEE
Idioma: Inglês

Voltar para lista de resultados