A Vacancy-Interstitial Defect Pair Model for Positive-Bias Temperature Stress-Induced Electron Trapping Transformation in the High- \kappa Gate n-MOSFET
Gu, Chenjie ; Ang, Diing Shenp ; Gao, Yuan ; Gu, Renyuan ; Zhao, Ziqi ; Zhu, Chao
IEEE transactions on electron devices, 2017-06, Vol.64 (6), p.2505-2511 [Periódico revisado por pares]IEEE
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