A low-cost synthesizable RISC-V dual-issue processor core leveraging the compressed Instruction Set Extension

Patsidis, Karyofyllis ; Konstantinou, Dimitris ; Nicopoulos, Chrysostomos ; Dimitrakopoulos, Giorgos

Microprocessors and microsystems, 2018-09, Vol.61, p.1-10 [Periódico revisado por pares]

Kidlington: Elsevier B.V

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