A router architecture with dual input and dual output channels for Networks-on-Chip

Zhou, Wu ; Ouyang, Yiming ; Lu, Yingchun ; Liang, Huaguo

Microprocessors and microsystems, 2022-04, Vol.90, p.104464, Article 104464 [Periódico revisado por pares]

Kidlington: Elsevier B.V

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