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Material Type: Artigo
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10T SRAM Using Half- V} Precharge and Row-Wise Dynamically Powered Read Port for Low Switching Power and Ultralow RBL LeakageMaroof, Naeem ; Bai-Sun KongIEEE transactions on very large scale integration (VLSI) systems, 2017-04, Vol.25 (4), p.1193-1203 [Periódico revisado por pares]IEEETexto completo disponível |
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Material Type: Artigo
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3-D-TCAD-Based Parasitic Capacitance Extraction for Emerging Multigate Devices and CircuitsBhoj, Ajay N. ; Joshi, Rajiv V. ; Jha, Niraj K.IEEE transactions on very large scale integration (VLSI) systems, 2013-11, Vol.21 (11), p.2094-2105 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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Material Type: Artigo
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692-nW Advanced Encryption Standard (AES) on a 0.13-μm CMOSGOOD, Tim ; BENAISSA, MohammedIEEE transactions on very large scale integration (VLSI) systems, 2010-12, Vol.18 (12), p.1753-1757 [Periódico revisado por pares]New York, NY: Institute of Electrical and Electronics EngineersTexto completo disponível |
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Material Type: Artigo
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81.6 GOPS Object Recognition Processor Based on a Memory-Centric NoCKIM, Donghyun ; KIM, Kwanho ; KIM, Joo-Young ; LEE, Seungjin ; LEE, Se-Joong ; YOO, Hoi-JunIEEE transactions on very large scale integration (VLSI) systems, 2009-03, Vol.17 (3), p.370-383 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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Material Type: Artigo
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A 0.13- \mu \text CMOS Dynamically Reconfigurable Charge Pump for Electrostatic MEMS ActuationAlameh, Abdul Hafiz ; Nabki, FredericIEEE transactions on very large scale integration (VLSI) systems, 2017-04, Vol.25 (4), p.1261-1270 [Periódico revisado por pares]IEEETexto completo disponível |
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Material Type: Artigo
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A 0.4-mW, 4.7-ps Resolution Single-Loop TDC Using a Half-Delay Time IntegratorKwon, Chan-Keun ; Kim, Hoonki ; Park, Jongsun ; Kim, Soo-WonIEEE transactions on very large scale integration (VLSI) systems, 2016-03, Vol.24 (3), p.1184-1188 [Periódico revisado por pares]New York: The Institute of Electrical and Electronics Engineers, Inc. (IEEE)Texto completo disponível |
7 |
Material Type: Artigo
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A 0.52/1 V Fast Lock-in ADPLL for Supporting Dynamic Voltage and Frequency ScalingChung, Ching-Che ; Su, Wei-Siang ; Lo, Chi-KuangIEEE transactions on very large scale integration (VLSI) systems, 2016-01, Vol.24 (1), p.408-412 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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Material Type: Artigo
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A 1036-F2/Bit High Reliability Temperature Compensated Cross-Coupled Comparator-Based PUFZhao, Qiang ; Wu, Yiheng ; Zhao, Xiaojin ; Cao, Yuan ; Chang, Chip-HongIEEE transactions on very large scale integration (VLSI) systems, 2020-06, Vol.28 (6), p.1449-1460 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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Material Type: Artigo
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A 104-GHz Phase-Locked Loop Using a VCO at Second Pole FrequencyTSAI, Kun-Hung ; LIU, Shen-IuanIEEE transactions on very large scale integration (VLSI) systems, 2012-01, Vol.20 (1), p.80-88 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
10 |
Material Type: Artigo
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A 2.4-GHz Area-Efficient and Fast-Locking Subharmonically Injection-Locked Type-I PLLChou, Ming-Han ; Liu, Shen-IuanIEEE transactions on very large scale integration (VLSI) systems, 2020-11, Vol.28 (11), p.2474-2478 [Periódico revisado por pares]New York: IEEETexto completo disponível |