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O(N) Memory-Free Hardware Architecture for Burrows-Wheeler Transform
O(N) Memory-Free Hardware Architecture for Burrows-Wheeler Transform
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O(N) Memory-Free Hardware Architecture for Burrows-Wheeler Transform

Ghosh, Surajeet ; Ray, Sanchita Saha

IEEE transactions on computers, 2023-07, Vol.72 (7), p.2080-2093 [Revista revisada por pares]

IEEE

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2
Hardware-Based Trusted Computing Architectures for Isolation and Attestation
Hardware-Based Trusted Computing Architectures for Isolation and Attestation
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Hardware-Based Trusted Computing Architectures for Isolation and Attestation

Maene, Pieter ; Gotzfried, Johannes ; de Clercq, Ruan ; Muller, Tilo ; Freiling, Felix ; Verbauwhede, Ingrid

IEEE transactions on computers, 2018-03, Vol.67 (3), p.361-374 [Revista revisada por pares]

New York: IEEE

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3
A High-Resilience Imprecise Computing Architecture for Mixed-Criticality Systems
A High-Resilience Imprecise Computing Architecture for Mixed-Criticality Systems
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A High-Resilience Imprecise Computing Architecture for Mixed-Criticality Systems

Jiang, Zhe ; Dai, Xiaotian ; Burns, Alan ; Audsley, Neil ; Gu, Zonghua ; Gray, Ian

IEEE transactions on computers, 2023-01, Vol.72 (1), p.29-42 [Revista revisada por pares]

New York: IEEE

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4
RvDfi: A RISC-V Architecture With Security Enforcement by High Performance Complete Data-Flow Integrity
RvDfi: A RISC-V Architecture With Security Enforcement by High Performance Complete Data-Flow Integrity
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RvDfi: A RISC-V Architecture With Security Enforcement by High Performance Complete Data-Flow Integrity

Feng, Lang ; Huang, Jiayi ; Li, Luyi ; Zhang, Haochen ; Wang, Zhongfeng

IEEE transactions on computers, 2022-10, Vol.71 (10), p.2499-2512 [Revista revisada por pares]

New York: IEEE

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5
Machine Learning Computers With Fractal von Neumann Architecture
Machine Learning Computers With Fractal von Neumann Architecture
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Machine Learning Computers With Fractal von Neumann Architecture

Zhao, Yongwei ; Fan, Zhe ; Du, Zidong ; Zhi, Tian ; Li, Ling ; Guo, Qi ; Liu, Shaoli ; Xu, Zhiwei ; Chen, Tianshi ; Chen, Yunji

IEEE transactions on computers, 2020-07, Vol.69 (7), p.998-1014 [Revista revisada por pares]

New York: IEEE

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6
A Lightweight and Chip-Level Reconfigurable Architecture for Next-Generation IoT End Devices
A Lightweight and Chip-Level Reconfigurable Architecture for Next-Generation IoT End Devices
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A Lightweight and Chip-Level Reconfigurable Architecture for Next-Generation IoT End Devices

Zhang, Chong ; Li, Songfan ; Song, Yihang ; Meng, Qianhe ; Lu, Li ; Zhu, Hongzi ; Wang, Xin

IEEE transactions on computers, 2024-03, Vol.73 (3), p.747-763 [Revista revisada por pares]

New York: IEEE

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7
Value Iteration Architecture Based Deep Learning for Intelligent Routing Exploiting Heterogeneous Computing Platforms
Value Iteration Architecture Based Deep Learning for Intelligent Routing Exploiting Heterogeneous Computing Platforms
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Value Iteration Architecture Based Deep Learning for Intelligent Routing Exploiting Heterogeneous Computing Platforms

Fadlullah, Zubair Md ; Mao, Bomin ; Tang, Fengxiao ; Kato, Nei

IEEE transactions on computers, 2019-06, Vol.68 (6), p.939-950 [Revista revisada por pares]

New York: IEEE

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8
Enabling HW-Based Task Scheduling in Large Multicore Architectures
Enabling HW-Based Task Scheduling in Large Multicore Architectures
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Enabling HW-Based Task Scheduling in Large Multicore Architectures

Morais, Lucas ; Alvarez, Carlos ; Jimenez-Gonzalez, Daniel ; de Haro, Juan Miguel ; Araujo, Guido ; Frank, Michael ; Goldman, Alfredo ; Martorell, Xavier

IEEE transactions on computers, 2024-01, Vol.73 (1), p.138-151 [Revista revisada por pares]

New York: IEEE

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9
An Ontology-Based Method for HW/SW Architecture Reconstruction
An Ontology-Based Method for HW/SW Architecture Reconstruction
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An Ontology-Based Method for HW/SW Architecture Reconstruction

Musavi, Seyyedeh Atefeh ; Hashemi, Mahmoud Reza

IEEE transactions on computers, 2019-07, Vol.68 (7), p.1007-1018 [Revista revisada por pares]

New York: IEEE

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10
Built-in Security Computer: Deploying Security-First Architecture Using Active Security Processor
Built-in Security Computer: Deploying Security-First Architecture Using Active Security Processor
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Built-in Security Computer: Deploying Security-First Architecture Using Active Security Processor

Meng, Dan ; Hou, Rui ; Shi, Gang ; Tu, Bibo ; Yu, Aimin ; Zhu, Ziyuan ; Jia, Xiaoqi ; Wen, Yu ; Yang, Yun

IEEE transactions on computers, 2020-11, Vol.69 (11), p.1571-1583 [Revista revisada por pares]

New York: IEEE

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