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Material Type: Ata de Congresso
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Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based ArchitectureShao, Yakun Sophia ; Clemons, Jason ; Venkatesan, Rangharajan ; Zimmer, Brian ; Fojtik, Matthew ; Jiang, Nan ; Keller, Ben ; Klinefelter, Alicia ; Pinckney, Nathaniel ; Raina, Priyanka ; Tell, Stephen G. ; Zhang, Yanqing ; Dally, William J. ; Emer, Joel ; Gray, C. Thomas ; Khailany, Brucek ; Keckler, Stephen W.Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019, p.14-27New York, NY, USA: ACMTexto completo disponível |
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Material Type: Ata de Congresso
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Stream-dataflow accelerationNowatzki, Tony ; Gangadhar, Vinay ; Ardalani, Newsha ; Sankaralingam, Karthikeyan2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA), 2017, p.416-429ACMSem texto completo |
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Material Type: Ata de Congresso
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DaDianNao: A Machine-Learning SupercomputerChen, Yunji ; Luo, Tao ; Liu, Shaoli ; Zhang, Shijin ; He, Liqiang ; Wang, Jia ; Li, Ling ; Chen, Tianshi ; Xu, Zhiwei ; Sun, Ninghui ; Temam, Olivier2014 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014, p.609-622Washington, DC, USA: IEEE Computer SocietyTexto completo disponível |
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Material Type: Ata de Congresso
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SCNN: An accelerator for compressed-sparse convolutional neural networksParashar, Angshuman ; Minsoo Rhu ; Mukkara, Anurag ; Puglielli, Antonio ; Venkatesan, Rangharajan ; Khailany, Brucek ; Emer, Joel ; Keckler, Stephen W. ; Dally, William J.2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA), 2017, p.27-40ACMSem texto completo |
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Material Type: Ata de Congresso
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OliVe: Accelerating Large Language Models via Hardware-friendly Outlier-Victim Pair QuantizationGuo, Cong ; Tang, Jiaming ; Hu, Weiming ; Leng, Jingwen ; Zhang, Chen ; Yang, Fan ; Liu, Yunxin ; Guo, Minyi ; Zhu, YuhaoProceedings of the 50th Annual International Symposium on Computer Architecture, 2023, p.1-15New York, NY, USA: ACMSem texto completo |
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Material Type: Artigo
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Optimizing the Convolution Operation to Accelerate Deep Neural Networks on FPGAMa, Yufei ; Cao, Yu ; Vrudhula, Sarma ; Seo, Jae-sunIEEE transactions on very large scale integration (VLSI) systems, 2018-07, Vol.26 (7), p.1354-1367 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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Material Type: Ata de Congresso
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Scheduling techniques for GPU architectures with processing-in-memory capabilitiesPattnaik, Ashutosh ; Xulong Tang ; Adwait Jog ; Kayiran, Onur ; Mishra, Asit K. ; Kandemir, Mahmut T. ; Mutlu, Onur ; Das, Chita R.2016 International Conference on Parallel Architecture and Compilation Techniques (PACT), 2016, p.31-44ACMSem texto completo |
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Material Type: Ata de Congresso
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A dynamically configurable coprocessor for convolutional neural networksChakradhar, Srimat ; Sankaradas, Murugan ; Jakkula, Venkata ; Cadambi, SrihariProceedings of the 37th annual international symposium on Computer architecture, 2010, p.247-257New York, NY, USA: ACMTexto completo disponível |
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Material Type: Artigo
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Overview of the SpiNNaker System ArchitectureFurber, Steve B. ; Lester, David R. ; Plana, Luis A. ; Garside, Jim D. ; Painkras, Eustace ; Temple, Steve ; Brown, Andrew D.IEEE transactions on computers, 2013-12, Vol.62 (12), p.2454-2467 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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Material Type: Artigo
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Fog-computing-based radio access networks: issues and challengesPeng, Mugen ; Yan, Shi ; Zhang, Kecheng ; Wang, ChonggangIEEE network, 2016-07, Vol.30 (4), p.46-53 [Periódico revisado por pares]New York: IEEETexto completo disponível |