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Gibbon: An Efficient Co-Exploration Framework of NN model and Processing-In-Memory Architecture
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Gibbon: An Efficient Co-Exploration Framework of NN model and Processing-In-Memory Architecture

Sun, Hanbo ; Zhu, Zhenhua ; Wang, Chenyu ; Ning, Xuefei ; Dai, Guohao ; Yang, Huazhong ; Wang, Yu

IEEE transactions on computer-aided design of integrated circuits and systems, 2023-11, Vol.42 (11), p.1-1 [Peer Reviewed Journal]

New York: IEEE

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MTHAEL: Cross-Architecture IoT Malware Detection Based on Neural Network Advanced Ensemble Learning
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MTHAEL: Cross-Architecture IoT Malware Detection Based on Neural Network Advanced Ensemble Learning

Vasan, Danish ; Alazab, Mamoun ; Venkatraman, Sitalakshmi ; Akram, Junaid ; Qin, Zheng

IEEE transactions on computers, 2020-11, Vol.69 (11), p.1654-1667 [Peer Reviewed Journal]

New York: IEEE

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Neural Architecture Search Survey: A Hardware Perspective
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Neural Architecture Search Survey: A Hardware Perspective

Chitty-Venkata, Krishna Teja ; Somani, Arun K.

ACM computing surveys, 2022-11, Vol.55 (4), p.1-36, Article 78 [Peer Reviewed Journal]

New York, NY: ACM

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HARDSEA: Hybrid Analog-ReRAM Clustering and Digital-SRAM In-Memory Computing Accelerator for Dynamic Sparse Self-Attention in Transformer
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HARDSEA: Hybrid Analog-ReRAM Clustering and Digital-SRAM In-Memory Computing Accelerator for Dynamic Sparse Self-Attention in Transformer

Liu, Shiwei ; Mu, Chen ; Jiang, Hao ; Wang, Yunzhengmao ; Zhang, Jinshan ; Lin, Feng ; Zhou, Keji ; Liu, Qi ; Chen, Chixiao

IEEE transactions on very large scale integration (VLSI) systems, 2024-02, Vol.32 (2), p.269-282 [Peer Reviewed Journal]

New York: IEEE

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5
SCANN: Synthesis of Compact and Accurate Neural Networks
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SCANN: Synthesis of Compact and Accurate Neural Networks

Hassantabar, Shayan ; Wang, Zeyu ; Jha, Niraj K.

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-09, Vol.41 (9), p.3012-3025 [Peer Reviewed Journal]

New York: IEEE

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OPU: An FPGA-Based Overlay Processor for Convolutional Neural Networks
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OPU: An FPGA-Based Overlay Processor for Convolutional Neural Networks

Yu, Yunxuan ; Wu, Chen ; Zhao, Tiandong ; Wang, Kun ; He, Lei

IEEE transactions on very large scale integration (VLSI) systems, 2020-01, Vol.28 (1), p.35-47 [Peer Reviewed Journal]

New York: IEEE

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7
A Tutorial on Ultrareliable and Low-Latency Communications in 6G: Integrating Domain Knowledge Into Deep Learning
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A Tutorial on Ultrareliable and Low-Latency Communications in 6G: Integrating Domain Knowledge Into Deep Learning

She, Changyang ; Sun, Chengjian ; Gu, Zhouyou ; Li, Yonghui ; Yang, Chenyang ; Poor, H. Vincent ; Vucetic, Branka

Proceedings of the IEEE, 2021-03, Vol.109 (3), p.204-246 [Peer Reviewed Journal]

New York: IEEE

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DyNNamic: Dynamically Reshaping, High Data-Reuse Accelerator for Compact DNNs
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DyNNamic: Dynamically Reshaping, High Data-Reuse Accelerator for Compact DNNs

Hanson, Edward ; Li, Shiyu ; Qian, Xuehai ; Li, Hai Helen ; Chen, Yiran

IEEE transactions on computers, 2023-03, Vol.72 (3), p.880-892 [Peer Reviewed Journal]

New York: IEEE

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9
An Energy-Efficient FPGA-Based Deconvolutional Neural Networks Accelerator for Single Image Super-Resolution
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An Energy-Efficient FPGA-Based Deconvolutional Neural Networks Accelerator for Single Image Super-Resolution

Chang, Jung-Woo ; Kang, Keon-Woo ; Kang, Suk-Ju

IEEE transactions on circuits and systems for video technology, 2020-01, Vol.30 (1), p.281-295 [Peer Reviewed Journal]

New York: IEEE

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10
Efficient Processing of Deep Neural Networks: A Tutorial and Survey
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Efficient Processing of Deep Neural Networks: A Tutorial and Survey

Sze, Vivienne ; Chen, Yu-Hsin ; Yang, Tien-Ju ; Emer, Joel S.

Proceedings of the IEEE, 2017-12, Vol.105 (12), p.2295-2329 [Peer Reviewed Journal]

New York: IEEE

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