Result Number | Material Type | Add to My Shelf Action | Record Details and Options |
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1 |
Material Type: Artigo
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Modeling of HCD Kinetics Under Full VG-VD Space, Different Experimental Conditions and Across Different Device ArchitecturesSharma, Uma ; Mahapatra, SouvikIEEE journal of the Electron Devices Society, 2020-01, Vol.8, p.1-1 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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2 |
Material Type: Artigo
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First record of the spatial organization of the nucleosome‐less chromatin of dinoflagellates: The nonrandom distribution of microsatellites and bipolar arrangement of telomeres in the nucleus of Gambierdiscus australes (Dinophyceae)Cuadrado, Ángeles ; Figueroa, Rosa I. ; Sixto, Marta ; Bravo, Isabel ; De Bustos, Alfredo ; Lin, S. Lin, S.Journal of phycology, 2022-04, Vol.58 (2), p.297-307 [Periódico revisado por pares]United States: Wiley Subscription Services, IncTexto completo disponível |
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3 |
Material Type: Artigo
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A 32 nm 0.58-fJ/Bit/Search 1-GHz Ternary Content Addressable Memory Compiler Using Silicon-Aware Early-Predict Late-Correct Sensing With Embedded Deep-Trench Capacitor Noise MitigationArsovski, I. ; Hebig, T. ; Dobson, D. ; Wistort, R.IEEE journal of solid-state circuits, 2013-04, Vol.48 (4), p.932-939 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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4 |
Material Type: Ata de Congresso
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Monolithic DFF-NAND and DFF-NOR logic circuits based on GaN MIS-HEMTZhu, Yuhao ; Cui, Miao ; Li, Ang ; Li, Fan ; Wen, Huiqing ; Liu, Wen2021 International Conference on IC Design and Technology (ICICDT), 2021, p.1-4IEEESem texto completo |
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5 |
Material Type: Artigo
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High-Reliability Dynamic-Threshold Source-Side Injection for 2-Bit/Cell With MLC Operation of Wrapped Select-Gate SONOS in nor-Type Flash MemoryWang, Kuan-Ti ; Chao, Tien-Sheng ; Wu, Woei-Cherng ; Yang, Wen-Luh ; Lee, Chien-Hsing ; Hsieh, Tsung-Min ; Liou, Jhyy-Cheng ; Wang, Shen-De ; Chen, Tzu-Ping ; Chen, Chien-Hung ; Lin, Chih-Hung ; Chen, Hwi-HuangIEEE transactions on electron devices, 2010-09, Vol.57 (9), p.2335-2338 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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6 |
Material Type: Artigo
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A novel self-aligned highly reliable sidewall split-gate flash memoryCaleb Yu-Sheng Cho ; Ming-Jer Chen ; Chiou-Feng Chen ; Tuntasood, P. ; Fan, D.-T. ; Tseng-Yi LiuIEEE transactions on electron devices, 2006-03, Vol.53 (3), p.465-473 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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7 |
Material Type: Artigo
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A strategy to emulate NOR flash with NAND flashChang, Yuan-Hao ; Lin, Jian-Hong ; Hsieh, Jen-Wei ; Kuo, Tei-WeiACM transactions on storage, 2010-07, Vol.6 (2), p.1-23 [Periódico revisado por pares]Texto completo disponível |
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8 |
Material Type: Artigo
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Design of monostable–bistable transition logic element using the BiCMOS-based negative differential resistance circuitGan, Kwang-Jow ; Tsai, Cher-Shiung ; Hsien, Chi-Wen ; Li, Yu-Kuang ; Yeh, Wen-KuanAnalog integrated circuits and signal processing, 2011-09, Vol.68 (3), p.379-385 [Periódico revisado por pares]Boston: Springer USTexto completo disponível |
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9 |
Material Type: Ata de Congresso
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Verilog - A compact model of a ME-MTJ based XNOR/NOR gateSharma, Nishtha ; Marshall, Andrew ; Bird, Jonathan2017 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), 2017, p.162-167IEEESem texto completo |
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10 |
Material Type: Capítulo de Livro
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Combinational Logic Design (Part I)Taraate, VaibbhavDigital Logic Design Using Verilog, 2016, p.27-52India: Springer (India) Private LimitedSem texto completo |