Result Number | Material Type | Add to My Shelf Action | Record Details and Options |
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Material Type: Artigo
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1-D Cell Generation With Printability EnhancementPo-Hsun Wu ; Lin, M. P. ; Tung-Chieh Chen ; Tsung-Yi Ho ; Yu-Chuan Chen ; Shun-Ren Siao ; Shu-Hung LinIEEE transactions on computer-aided design of integrated circuits and systems, 2013-03, Vol.32 (3), p.419-432 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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2 |
Material Type: Artigo
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1+1<2: Efficient Automatic Standard Cell Sharing between Digital VLSI Designs for Area SavingFeng, Lang ; Sha, Jin ; Wang, ZhongfengIEEE transactions on computer-aided design of integrated circuits and systems, 2023-11, Vol.42 (11), p.1-1 [Periódico revisado por pares]IEEETexto completo disponível |
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3 |
Material Type: Artigo
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2-D CA variation with asymmetric neighborship for pseudorandom number generationSheng-Uei Guan ; Shu Zhang ; Quieta, M.T.IEEE transactions on computer-aided design of integrated circuits and systems, 2004-03, Vol.23 (3), p.378-388 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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4 |
Material Type: Artigo
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2-D Inductor-Capacitor Lattice SynthesisBhat, H. S. ; Osting, B.IEEE transactions on computer-aided design of integrated circuits and systems, 2011-10, Vol.30 (10), p.1483-1492 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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5 |
Material Type: Artigo
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2-D mesh adaption and flux discretizations for dopant diffusion modelingChih-Chuan Lin ; Law, M.E.IEEE transactions on computer-aided design of integrated circuits and systems, 1996-02, Vol.15 (2), p.194-207 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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6 |
Material Type: Artigo
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2-D Modeling of Dual-Gate MOSFET Devices Using Quintic SplinesWolfson, Scott C. ; Ho, Fat D.IEEE transactions on computer-aided design of integrated circuits and systems, 2019-03, Vol.38 (3), p.480-488 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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7 |
Material Type: Artigo
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2 NEW TECHNIQUES FOR UNIT-DELAY COMPILED SIMULATIONMAURER, PMIEEE transactions on computer-aided design of integrated circuits and systems, 1992-09, Vol.11 (9), p.1120-1130 [Periódico revisado por pares]NEW YORK: IEEETexto completo disponível |
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8 |
Material Type: Artigo
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2^ Pattern Run-Length for Test Data CompressionLee, Lung-Jen ; Tseng, Wang-Dauh ; Lin, Rung-Bin ; Chang, Cheng-HoIEEE transactions on computer-aided design of integrated circuits and systems, 2012-04, Vol.31 (4), p.644-648 [Periódico revisado por pares]IEEETexto completo disponível |
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9 |
Material Type: Artigo
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2Deep: Enhancing Side-Channel Attacks on Lattice-Based Key-Exchange via 2-D Deep LearningKashyap, Priyank ; Aydin, Furkan ; Potluri, Seetal ; Franzon, Paul D. ; Aysu, AydinIEEE transactions on computer-aided design of integrated circuits and systems, 2021-06, Vol.40 (6), p.1217-1229 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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10 |
Material Type: Artigo
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3-D Mesh-Based Optical Network-on-Chip for Multiprocessor System-on-ChipYaoyao Ye ; Jiang Xu ; Baihan Huang ; Xiaowen Wu ; Wei Zhang ; Xuan Wang ; Nikdast, M. ; Zhehui Wang ; Weichen Liu ; Zhe WangIEEE transactions on computer-aided design of integrated circuits and systems, 2013-04, Vol.32 (4), p.584-596 [Periódico revisado por pares]IEEETexto completo disponível |