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Test Flow Selection for Stacked Integrated Circuits
Test Flow Selection for Stacked Integrated Circuits
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Test Flow Selection for Stacked Integrated Circuits

SenGupta, Breeta ; Nikolov, Dimitar ; Dash, Assmitra ; Larsson, Erik

Journal of electronic testing, 2019-08, Vol.35 (4), p.425-440 [Periódico revisado por pares]

New York: Springer US

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2
An LO phase shifter with frequency tripling and phase detection in 28 nm FD-SOI CMOS for mm-wave 5G transceivers
An LO phase shifter with frequency tripling and phase detection in 28 nm FD-SOI CMOS for mm-wave 5G transceivers
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An LO phase shifter with frequency tripling and phase detection in 28 nm FD-SOI CMOS for mm-wave 5G transceivers

Gannedahl, Rikard ; Sjöland, Henrik

Analog integrated circuits and signal processing, 2023, Vol.114 (1), p.1-11 [Periódico revisado por pares]

New York: Springer US

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3
An ultra-low power high-precision logarithmic-curvature compensated all-CMOS voltage reference in 65 nm CMOS
An ultra-low power high-precision logarithmic-curvature compensated all-CMOS voltage reference in 65 nm CMOS
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An ultra-low power high-precision logarithmic-curvature compensated all-CMOS voltage reference in 65 nm CMOS

Ghanavati Nejad, Tayebeh ; Farshidi, Ebrahim ; Sjöland, Henrik ; Kosarian, Abdolnabi

Analog integrated circuits and signal processing, 2021-05, Vol.107 (2), p.319-330 [Periódico revisado por pares]

New York: Springer US

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4
A low-power 2nd-order CT delta–sigma modulator with an asynchronous SAR quantizer
A low-power 2nd-order CT delta–sigma modulator with an asynchronous SAR quantizer
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A low-power 2nd-order CT delta–sigma modulator with an asynchronous SAR quantizer

Radjen, Dejan ; Anderson, Martin ; Sundström, Lars ; Andreani, Pietro

Analog integrated circuits and signal processing, 2015-09, Vol.84 (3), p.409-420 [Periódico revisado por pares]

New York: Springer US

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5
A 60 GHz receiver front-end with PLL based phase controlled LO generation for phased-arrays
A 60 GHz receiver front-end with PLL based phase controlled LO generation for phased-arrays
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A 60 GHz receiver front-end with PLL based phase controlled LO generation for phased-arrays

Axholt, Andreas ; Sjöland, Henrik

Analog integrated circuits and signal processing, 2014-07, Vol.80 (1), p.23-32 [Periódico revisado por pares]

Boston: Springer US

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6
A high precision logarithmic-curvature compensated all CMOS voltage reference
A high precision logarithmic-curvature compensated all CMOS voltage reference
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A high precision logarithmic-curvature compensated all CMOS voltage reference

Ghanavati Nejad, Tayebeh ; Farshidi, Ebrahim ; Sjöland, Henrik ; Kosarian, Abdolnabi

Analog integrated circuits and signal processing, 2019-05, Vol.99 (2), p.383-392 [Periódico revisado por pares]

New York: Springer US

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7
Test Planning for Core-based Integrated Circuits under Power Constraints
Test Planning for Core-based Integrated Circuits under Power Constraints
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Test Planning for Core-based Integrated Circuits under Power Constraints

SenGupta, Breeta ; Nikolov, Dimitar ; Ingelsson, Urban ; Larsson, Erik

Journal of electronic testing, 2017-02, Vol.33 (1), p.7-23 [Periódico revisado por pares]

New York: Springer US

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8
A wide band fractional-N digital PLL with a noise shaping 2-D time to digital converter for LTE-A applications
A wide band fractional-N digital PLL with a noise shaping 2-D time to digital converter for LTE-A applications
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A wide band fractional-N digital PLL with a noise shaping 2-D time to digital converter for LTE-A applications

Mahmoud, Ahmed ; Andreani, Pietro ; Lu, Ping

Analog integrated circuits and signal processing, 2016-11, Vol.89 (2), p.337-345 [Periódico revisado por pares]

New York: Springer US

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9
System simulations of a 1.5 V SiGe 81–86 GHz E-band transmitter
System simulations of a 1.5 V SiGe 81–86 GHz E-band transmitter
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System simulations of a 1.5 V SiGe 81–86 GHz E-band transmitter

Tired, Tobias ; Sandrup, Per ; Nejdel, Anders ; Wernehag, Johan ; Sjöland, Henrik

Analog integrated circuits and signal processing, 2017-02, Vol.90 (2), p.333-349 [Periódico revisado por pares]

New York: Springer US

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10
A low-power 2nd-order CT delta-sigma modulator with a single operational amplifier
A low-power 2nd-order CT delta-sigma modulator with a single operational amplifier
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A low-power 2nd-order CT delta-sigma modulator with a single operational amplifier

Radjen, Dejan ; Anderson, Martin ; Sundström, Lars ; Andreani, Pietro

Analog integrated circuits and signal processing, 2014-09, Vol.80 (3), p.387-397 [Periódico revisado por pares]

Boston: Springer US

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