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SASCHA -Sparsity-Aware Stochastic Computing Hardware Architecture for Neural Network Acceleration
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SASCHA -Sparsity-Aware Stochastic Computing Hardware Architecture for Neural Network Acceleration

Romaszkan, Wojciech ; Li, Tianmu ; Gupta, Puneet

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-11, Vol.41 (11), p.1-1 [Periódico revisado por pares]

New York: IEEE

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Hardware/Software Co-Exploration of Neural Architectures
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Hardware/Software Co-Exploration of Neural Architectures

Jiang, Weiwen ; Yang, Lei ; Sha, Edwin Hsing-Mean ; Zhuge, Qingfeng ; Gu, Shouzhen ; Dasgupta, Sakyasingha ; Shi, Yiyu ; Hu, Jingtong

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-12, Vol.39 (12), p.4805-4815 [Periódico revisado por pares]

IEEE

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3
YodaNN: An Architecture for Ultralow Power Binary-Weight CNN Acceleration
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YodaNN: An Architecture for Ultralow Power Binary-Weight CNN Acceleration

Andri, Renzo ; Cavigelli, Lukas ; Rossi, Davide ; Benini, Luca

IEEE transactions on computer-aided design of integrated circuits and systems, 2018-01, Vol.37 (1), p.48-60 [Periódico revisado por pares]

IEEE

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4
ASSURED: Architecture for Secure Software Update of Realistic Embedded Devices
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ASSURED: Architecture for Secure Software Update of Realistic Embedded Devices

Asokan, N. ; Nyman, Thomas ; Rattanavipanon, Norrathep ; Sadeghi, Ahmad-Reza ; Tsudik, Gene

IEEE transactions on computer-aided design of integrated circuits and systems, 2018-11, Vol.37 (11), p.2290-2300 [Periódico revisado por pares]

New York: IEEE

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5
Rubik: A Hierarchical Architecture for Efficient Graph Neural Network Training
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Rubik: A Hierarchical Architecture for Efficient Graph Neural Network Training

Chen, Xiaobing ; Wang, Yuke ; Xie, Xinfeng ; Hu, Xing ; Basak, Abanti ; Liang, Ling ; Yan, Mingyu ; Deng, Lei ; Ding, Yufei ; Du, Zidong ; Xie, Yuan

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-04, Vol.41 (4), p.936-949 [Periódico revisado por pares]

New York: IEEE

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6
Architecture Considerations for Stochastic Computing Accelerators
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Architecture Considerations for Stochastic Computing Accelerators

Lee, Vincent T. ; Alaghi, Armin ; Pamula, Rajesh ; Sathe, Visvesh S. ; Ceze, Luis ; Oskin, Mark

IEEE transactions on computer-aided design of integrated circuits and systems, 2018-11, Vol.37 (11), p.2277-2289 [Periódico revisado por pares]

New York: IEEE

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7
Morphling: A Reconfigurable Architecture for Tensor Computation
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Morphling: A Reconfigurable Architecture for Tensor Computation

Lu, Liqiang ; Liang, Yun

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-11, Vol.41 (11), p.4733-4746 [Periódico revisado por pares]

New York: IEEE

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8
M²NAS: Joint Neural Architecture Optimization System With Network Transmission
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M²NAS: Joint Neural Architecture Optimization System With Network Transmission

Wang, Lanfei ; Xie, Lingxi ; Bi, Kaifeng ; Zhao, Kaili ; Guo, Jun ; Tian, Qi

IEEE transactions on computer-aided design of integrated circuits and systems, 2023-08, Vol.42 (8), p.2631-2642 [Periódico revisado por pares]

New York: IEEE

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9
LightNAS: On Lightweight and Scalable Neural Architecture Search for Embedded Platforms
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LightNAS: On Lightweight and Scalable Neural Architecture Search for Embedded Platforms

Luo, Xiangzhong ; Liu, Di ; Kong, Hao ; Huai, Shuo ; Chen, Hui ; Liu, Weichen

IEEE transactions on computer-aided design of integrated circuits and systems, 2023-06, Vol.42 (6), p.1784-1797 [Periódico revisado por pares]

New York: IEEE

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GraphH: A Processing-in-Memory Architecture for Large-Scale Graph Processing
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GraphH: A Processing-in-Memory Architecture for Large-Scale Graph Processing

Dai, Guohao ; Huang, Tianhao ; Chi, Yuze ; Zhao, Jishen ; Sun, Guangyu ; Liu, Yongpan ; Wang, Yu ; Xie, Yuan ; Yang, Huazhong

IEEE transactions on computer-aided design of integrated circuits and systems, 2019-04, Vol.38 (4), p.640-653 [Periódico revisado por pares]

New York: IEEE

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