Result Number | Material Type | Add to My Shelf Action | Record Details and Options |
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Material Type: Artigo
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Overview of the SpiNNaker System ArchitectureFurber, Steve B. ; Lester, David R. ; Plana, Luis A. ; Garside, Jim D. ; Painkras, Eustace ; Temple, Steve ; Brown, Andrew D.IEEE transactions on computers, 2013-12, Vol.62 (12), p.2454-2467 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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2 |
Material Type: Artigo
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High Throughput/Gate AES Hardware Architectures Based on Datapath CompressionUeno, Rei ; Homma, Naofumi ; Morioka, Sumio ; Miura, Noriyuki ; Matsuda, Kohei ; Nagata, Makoto ; Bhasin, Shivam ; Mathieu, Yves ; Graba, Tarik ; Danger, Jean-LucIEEE transactions on computers, 2020-04, Vol.69 (4), p.534-548 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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3 |
Material Type: Artigo
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NeST: A Neural Network Synthesis Tool Based on a Grow-and-Prune ParadigmDai, Xiaoliang ; Yin, Hongxu ; Jha, Niraj K.IEEE transactions on computers, 2019-10, Vol.68 (10), p.1487-1497 [Periódico revisado por pares]IEEETexto completo disponível |
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4 |
Material Type: Artigo
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Hardware-Based Trusted Computing Architectures for Isolation and AttestationMaene, Pieter ; Gotzfried, Johannes ; de Clercq, Ruan ; Muller, Tilo ; Freiling, Felix ; Verbauwhede, IngridIEEE transactions on computers, 2018-03, Vol.67 (3), p.361-374 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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5 |
Material Type: Artigo
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Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural AcceleratorsJiang, Weiwen ; Lou, Qiuwen ; Yan, Zheyu ; Yang, Lei ; Hu, Jingtong ; Hu, Xiaobo Sharon ; Shi, YiyuIEEE transactions on computers, 2021-04, Vol.70 (4), p.595-605 [Periódico revisado por pares]IEEETexto completo disponível |
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6 |
Material Type: Artigo
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Enhancing Graph Random Walk Acceleration via Efficient Dataflow and Hybrid Memory ArchitectureGao, Yingxue ; Wang, Teng ; Gong, Lei ; Wang, Chao ; Hu, Yiqing ; Yang, Yi ; Liu, Zhongming ; Li, Xi ; Zhou, XuehaiIEEE transactions on computers, 2024-03, Vol.73 (3), p.887-901 [Periódico revisado por pares]IEEETexto completo disponível |
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7 |
Material Type: Artigo
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Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set ModeHepola, Kari ; Multanen, Joonas ; Jaaskelainen, PekkaIEEE transactions on computers, 2024-02, Vol.73 (2), p.1-13 [Periódico revisado por pares]IEEETexto completo disponível |
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8 |
Material Type: Artigo
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Elliptic-Curve-Based Security Processor for RFIDYong Ki Lee ; Sakiyama, K. ; Batina, L. ; Verbauwhede, I.IEEE transactions on computers, 2008-11, Vol.57 (11), p.1514-1527 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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9 |
Material Type: Artigo
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MINOTAuR: A Timing Predictable RISC-V Core Featuring Speculative ExecutionGruin, Alban ; Carle, Thomas ; Rochange, Christine ; Casse, Hugues ; Sainrat, PascalIEEE transactions on computers, 2023-01, Vol.72 (1), p.1-14 [Periódico revisado por pares]IEEETexto completo disponível |
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10 |
Material Type: Artigo
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An Ontology-Based Method for HW/SW Architecture ReconstructionMusavi, Seyyedeh Atefeh ; Hashemi, Mahmoud RezaIEEE transactions on computers, 2019-07, Vol.68 (7), p.1007-1018 [Periódico revisado por pares]IEEETexto completo disponível |