skip to main content
Idioma:
Mostrar Somente
Refinado por: assunto: Physical Sciences remover assunto: Silicon remover
Result Number Material Type Add to My Shelf Action Record Details and Options
1
A 3-D Analytical Physically Based Model for the Subthreshold Swing in Undoped Trigate FinFETs
A 3-D Analytical Physically Based Model for the Subthreshold Swing in Undoped Trigate FinFETs
Material Type:
Artigo 		Adicionar ao Meu Espaço

A 3-D Analytical Physically Based Model for the Subthreshold Swing in Undoped Trigate FinFETs

Abd El Hamid, H. ; Guitart, J.R. ; Kilchytska, V. ; Flandre, D. ; Iniguez, B.

IEEE transactions on electron devices, 2007-09, Vol.54 (9), p.2487-2496 [Periódico revisado por pares]

New York, NY: IEEE

Texto completo disponível

Citações Citado por
2
Transistor Matching and Fin Angle Variation in FinFET Technology
Transistor Matching and Fin Angle Variation in FinFET Technology
Material Type:
Artigo 		Adicionar ao Meu Espaço

Transistor Matching and Fin Angle Variation in FinFET Technology

Agarwal, Samarth ; Hook, Terence B. ; Bajaj, Mohit ; McStay, Kevin ; Weike Wang ; Yanting Zhang

IEEE transactions on electron devices, 2015-04, Vol.62 (4), p.1357-1359 [Periódico revisado por pares]

IEEE

Texto completo disponível

Citações Citado por
3
Performance Comparison of s-Si, In0.53Ga0.47As, Monolayer BP- and WS2-Based n-MOSFETs for Future Technology Nodes-Part II: Circuit-Level Comparison
Performance Comparison of s-Si, In0.53Ga0.47As, Monolayer BP- and WS2-Based n-MOSFETs for Future Technology Nodes-Part II: Circuit-Level Comparison
Material Type:
Artigo 		Adicionar ao Meu Espaço

Performance Comparison of s-Si, In0.53Ga0.47As, Monolayer BP- and WS2-Based n-MOSFETs for Future Technology Nodes-Part II: Circuit-Level Comparison

Agarwal, Tarun Kumar ; Rau, Martin ; Radu, Iuliana ; Luisier, Mathieu ; Dehaene, Wim ; Heyns, Marc

IEEE transactions on electron devices, 2019-08, Vol.66 (8), p.3614-3619 [Periódico revisado por pares]

IEEE

Texto completo disponível

Citações Citado por
4
Performance Comparison of s-Si, In0.53Ga0.47As, Monolayer BP, and WS2-Based n-MOSFETs for Future Technology Nodes-Part I: Device-Level Comparison
Performance Comparison of s-Si, In0.53Ga0.47As, Monolayer BP, and WS2-Based n-MOSFETs for Future Technology Nodes-Part I: Device-Level Comparison
Material Type:
Artigo 		Adicionar ao Meu Espaço

Performance Comparison of s-Si, In0.53Ga0.47As, Monolayer BP, and WS2-Based n-MOSFETs for Future Technology Nodes-Part I: Device-Level Comparison

Agarwal, Tarun Kumar ; Rau, Martin ; Radu, Iuliana ; Luisier, Mathieu ; Dehaene, Wim ; Heyns, Marc

IEEE transactions on electron devices, 2019-08, Vol.66 (8), p.3608-3613 [Periódico revisado por pares]

IEEE

Texto completo disponível

Citações Citado por
5
Impact of Variation in Nanoscale Silicon and Non-Silicon FinFETs and Tunnel FETs on Device and SRAM Performance
Impact of Variation in Nanoscale Silicon and Non-Silicon FinFETs and Tunnel FETs on Device and SRAM Performance
Material Type:
Artigo 		Adicionar ao Meu Espaço

Impact of Variation in Nanoscale Silicon and Non-Silicon FinFETs and Tunnel FETs on Device and SRAM Performance

Agrawal, Nidhi ; Huichu Liu ; Arghavani, Reza ; Narayanan, Vijay ; Datta, Suman

IEEE transactions on electron devices, 2015-06, Vol.62 (6), p.1691-1697 [Periódico revisado por pares]

IEEE

Texto completo disponível

Citações Citado por
6
Impact of Transistor Architecture (Bulk Planar, Trigate on Bulk, Ultrathin-Body Planar SOI) and Material (Silicon or III-V Semiconductor) on Variation for Logic and SRAM Applications
Impact of Transistor Architecture (Bulk Planar, Trigate on Bulk, Ultrathin-Body Planar SOI) and Material (Silicon or III-V Semiconductor) on Variation for Logic and SRAM Applications
Material Type:
Artigo 		Adicionar ao Meu Espaço

Impact of Transistor Architecture (Bulk Planar, Trigate on Bulk, Ultrathin-Body Planar SOI) and Material (Silicon or III-V Semiconductor) on Variation for Logic and SRAM Applications

Agrawal, Nidhi ; Kimura, Yoshie ; Arghavani, Reza ; Datta, Suman

IEEE transactions on electron devices, 2013-10, Vol.60 (10), p.3298-3304 [Periódico revisado por pares]

New York, NY: IEEE

Texto completo disponível

Citações Citado por
7
Performance Investigation of Silicon-on-Insulator Junctionless Drain Extended FinFET for High Power, Radio Frequency Applications
Performance Investigation of Silicon-on-Insulator Junctionless Drain Extended FinFET for High Power, Radio Frequency Applications
Material Type:
Artigo 		Adicionar ao Meu Espaço

Performance Investigation of Silicon-on-Insulator Junctionless Drain Extended FinFET for High Power, Radio Frequency Applications

Ajay

SILICON, 2021-07, Vol.13 (7), p.2381-2387 [Periódico revisado por pares]

Dordrecht: Springer Netherlands

Texto completo disponível

Citações Citado por
8
Vertically stacked lateral Si80Ge20 nanowires transistors for 5 nm CMOS applications
Vertically stacked lateral Si80Ge20 nanowires transistors for 5 nm CMOS applications
Material Type:
Ata de Congresso 		Adicionar ao Meu Espaço

Vertically stacked lateral Si80Ge20 nanowires transistors for 5 nm CMOS applications

Al-Ameri, Talib ; Asenov, Asen

2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), 2017, p.101-104

IEEE

Sem texto completo

Citações Citado por
9
Radiation hardness of FDSOI and FinFET technologies
Radiation hardness of FDSOI and FinFET technologies
Material Type:
Ata de Congresso 		Adicionar ao Meu Espaço

Radiation hardness of FDSOI and FinFET technologies

Alles, M. L. ; Schrimpf, R. D. ; Reed, R. A. ; Massengill, L. W. ; Weller, R. A. ; Mendenhall, M. H. ; Ball, D. R. ; Warren, K. M. ; Loveless, T. D. ; Kauppila, J. S. ; Sierawski, B. D.

IEEE 2011 International SOI Conference, 2011, p.1-2 [Periódico revisado por pares]

IEEE

Texto completo disponível

Citações Citado por
10
Design and Comparative Analysis of FD-SOI FinFET with Dual-dielectric Spacers for High Speed Switching Applications
Design and Comparative Analysis of FD-SOI FinFET with Dual-dielectric Spacers for High Speed Switching Applications
Material Type:
Artigo 		Adicionar ao Meu Espaço

Design and Comparative Analysis of FD-SOI FinFET with Dual-dielectric Spacers for High Speed Switching Applications

Amani, Manmari ; Panigrahy, Asisa Kumar ; Choubey, Abhishek ; Choubey, Shruti Bhargava ; Sreenivasulu, V. Bharath ; Nair, Digvijay V. ; Swain, Raghunandan

SILICON, 2024-02, Vol.16 (4), p.1525-1534 [Periódico revisado por pares]

Dordrecht: Springer Netherlands

Texto completo disponível

Citações Citado por

Personalize Seus Resultados

  1. Editar

Refine Search Results

Expandir Meus Resultados

  1.   

Mostrar Somente

  1. Recursos Online (294)
  2. Revistas revisadas por pares (248)

Refinar Meus Resultados

Tipo de Recurso 

  1. Artigos  (241)
  2. Anais de Congresso  (83)
  3. magazinearticle  (6)
  4. Mais opções open sub menu

Data de Publicação 

De até
Refinar
  1. Antes de2005  (14)
  2. 2005Até2008  (41)
  3. 2009Até2012  (40)
  4. 2013Até2017  (98)
  5. Após 2017  (139)
  6. Mais opções open sub menu

  • Realização: ABCD-USP USP   Logos de Redes Sociais: Freepik

Buscando em bases de dados remotas. Favor aguardar.