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0–1 ILP-based run-time hierarchical energy optimization for heterogeneous cluster-based multi/many-core systems
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0–1 ILP-based run-time hierarchical energy optimization for heterogeneous cluster-based multi/many-core systems

Yang, Simei ; Le Nours, Sébastien ; Mendez Real, Maria ; Pillement, Sébastien

Journal of systems architecture, 2021-06, Vol.116, p.102035, Article 102035 [Peer Reviewed Journal]

Elsevier B.V

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2
0D/2D NiS2/V-MXene composite for electrocatalytic H2 evolution
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0D/2D NiS2/V-MXene composite for electrocatalytic H2 evolution

Kuang, Panyong ; He, Min ; Zhu, Bicheng ; Yu, Jiaguo ; Fan, Ke ; Jaroniec, Mietek

Journal of catalysis, 2019-07, Vol.375, p.8-20 [Peer Reviewed Journal]

Elsevier Inc

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3
1-V quasi constant-g input/output rail-to-rail CMOS op-amp
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1-V quasi constant-g input/output rail-to-rail CMOS op-amp

Carrillo, Juan M. ; Duque-Carrillo, J.Francisco ; Torelli, Guido ; Ausı́n, José L.

Integration (Amsterdam), 2003-11, Vol.36 (4), p.161-174 [Peer Reviewed Journal]

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4
1.672 Gigabits/s FPGA based Viterbi decoder for 4D 8PSK TCM
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1.672 Gigabits/s FPGA based Viterbi decoder for 4D 8PSK TCM

Rahman, A.T.M. Anishur ; Cowley, W.G.

Digital signal processing, 2010, Vol.20 (1), p.263-268 [Peer Reviewed Journal]

Elsevier Inc

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5
A 0.004% resolution & SAT<1.8 μson-chip adaptive anti-aging system using cuckoo intelligence-based algorithm in 65 nm CMOS
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A 0.004% resolution & SAT<1.8 μson-chip adaptive anti-aging system using cuckoo intelligence-based algorithm in 65 nm CMOS

Zhang, Yuejun ; Zhang, Haiming ; Wang, Pengjun ; Wu, Qiufeng ; Li, Gang

Integration (Amsterdam), 2021-05, Vol.78, p.135-143 [Peer Reviewed Journal]

Amsterdam: Elsevier B.V

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6
A 0.2-V 1.2&#160;nW 1-KS/s SAR ADC with a novel comparator structure for biomedical applications
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A 0.2-V 1.2 nW 1-KS/s SAR ADC with a novel comparator structure for biomedical applications

Vafaei, M. ; Hosseini, M.R. ; Abiri, E. ; Salehi, M.R.

Integration (Amsterdam), 2023-01, Vol.88, p.362-370 [Peer Reviewed Journal]

Elsevier B.V

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7
A 0.33 V 2.5 &#181;W cross-point data-aware write structure, read-half-select disturb-free sub-threshold SRAM in 130 nm CMOS
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A 0.33 V 2.5 µW cross-point data-aware write structure, read-half-select disturb-free sub-threshold SRAM in 130 nm CMOS

Jin, Wei ; He, Weifeng ; Jiang, Jianfei ; Huang, Haichao ; Zhao, Xuejun ; Sun, Yanan ; Chen, Xin ; Jing, Naifeng

Integration (Amsterdam), 2017-06, Vol.58, p.27 [Peer Reviewed Journal]

Amsterdam: Elsevier BV

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8
A 0.33 V 2.5 &#956;W cross-point data-aware write structure, read-half-select disturb-free sub-threshold SRAM in 130 nm CMOS
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A 0.33 V 2.5 μW cross-point data-aware write structure, read-half-select disturb-free sub-threshold SRAM in 130 nm CMOS

Jin, Wei ; He, Weifeng ; Jiang, Jianfei ; Huang, Haichao ; Zhao, Xuejun ; Sun, Yanan ; Chen, Xin ; Jing, Naifeng

Integration (Amsterdam), 2017-06, Vol.58, p.27-34 [Peer Reviewed Journal]

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9
A 0.6in CRT as a miniature display device
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A 0.6in CRT as a miniature display device

Oki, Kyoichi ; Ozawa, Lyuji

Displays, 1995, Vol.16 (2), p.59-67 [Peer Reviewed Journal]

Elsevier B.V

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10
A 0.6V 1.07 &#956;W/Channel neural interface IC using level-shifted feedback
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A 0.6V 1.07 μW/Channel neural interface IC using level-shifted feedback

Lyu, Liangjian ; Wang, Yu ; Chen, Chixiao ; Richard Shi, C.-J.

Integration (Amsterdam), 2020-01, Vol.70, p.51-59 [Peer Reviewed Journal]

Amsterdam: Elsevier B.V

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