Result Number | Material Type | Add to My Shelf Action | Record Details and Options |
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1 |
Material Type: Artigo
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Verifying a logic-synthesis algorithm and implementation: a case study in software verificationAagaard, M. ; Leeser, M.IEEE transactions on software engineering, 1995-10, Vol.21 (10), p.822-833 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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2 |
Material Type: Capítulo de Livro
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A Hazards-Based Correctness Statement for Pipelined CircuitsAagaard, Mark D. Geist, Daniel ; Tronci, EnricoCorrect Hardware Design and Verification Methods, 2003, p.66-80 [Periódico revisado por pares]Berlin, Heidelberg: Springer Berlin HeidelbergTexto completo disponível |
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3 |
Material Type: Ata de Congresso
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Combining Equivalence Verification and Completion FunctionsAagaard, Mark D. ; Ciubotariu, Vlad C. ; Higgins, Jason T. ; Khalvati, Farzad Martin, Andrew K. ; Hu, Alan J.Formal Methods in Computer-Aided Design, 2004, p.98-112 [Periódico revisado por pares]Berlin, Heidelberg: Springer Berlin HeidelbergTexto completo disponível |
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4 |
Material Type: Artigo
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A framework for superscalar microprocessor correctness statementsAAGAARD, Mark D ; COOK, Byron ; DAY, Nancy A ; JONES, Robert BInternational journal on software tools for technology transfer, 2003-05, Vol.4 (3), p.298-312 [Periódico revisado por pares]Berlin: SpringerTexto completo disponível |
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5 |
Material Type: Ata de Congresso
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Synchronization-at-Retirement for Pipeline VerificationAagaard, Mark D. ; Day, Nancy A. ; Jones, Robert B. Martin, Andrew K. ; Hu, Alan J.Formal Methods in Computer-Aided Design, 2004, p.113-127 [Periódico revisado por pares]Berlin, Heidelberg: Springer Berlin HeidelbergTexto completo disponível |
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6 |
Material Type: Ata de Congresso
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Relating Multi-step and Single-Step Microprocessor Correctness StatementsAagaard, Mark D. ; Day, Nancy A. ; Lou, Meng Aagaard, Mark D. ; O’Leary, John W.Formal Methods in Computer-Aided Design, 2002, p.123-141 [Periódico revisado por pares]Berlin, Heidelberg: Springer Berlin HeidelbergTexto completo disponível |
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7 |
Material Type: Ata de Congresso
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A methodology for large-scale hardware verificationAAGAARD, Mark D ; JONES, Robert B ; MELHAM, Thomas F ; O'LEARY, John W ; SEGER, Carl-Johan HLecture notes in computer science, 2000, p.263-282 [Periódico revisado por pares]Berlin: SpringerTexto completo disponível |
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8 |
Material Type: Capítulo de Livro
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Xs Are for Trajectory Evaluation, Booleans Are for Theorem ProvingAagaard, Mark D. ; Melham, Thomas F. ; O’Leary, John W. Pierre, Laurence ; Kropf, ThomasCorrect Hardware Design and Verification Methods, 1999, p.202-218 [Periódico revisado por pares]Berlin, Heidelberg: Springer Berlin HeidelbergTexto completo disponível |
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9 |
Material Type: Ata de Congresso
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Modelling QoS: Towards a UML ProfileAagedal, Jan Øyvind ; Ecklund, Earl F. Cook, Stephen ; Hussmann, Heinrich ; Jézéquel, Jean-MarcLecture notes in computer science, 2002, p.275-289 [Periódico revisado por pares]Berlin, Heidelberg: Springer Berlin HeidelbergTexto completo disponível |
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10 |
Material Type: Ata de Congresso
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Linking Information with Distributed ObjectsAalberg, Trond Sølvberg, Ingeborg T. ; Constantopoulos, PanosLecture notes in computer science, 2001, p.149-160 [Periódico revisado por pares]Berlin, Heidelberg: Springer Berlin HeidelbergTexto completo disponível |